1. Field of the Invention
Example embodiments of the present invention relate to a semiconductor memory device and, more particularly, to a semiconductor memory device which can control a data swing width of an output buffer, a memory system having the same, and a swing width control method thereof.
2. Description of the Related Art
A semiconductor memory device such as a DRAM, for example, should have a definite swing width of data transmitted through a wire line on a PCB substrate on which the semiconductor memory device may be mounted. For example, if a semiconductor memory device is mounted on a memory module, for example, a single in-line memory module (SIMM) or a double in-line memory module (DIMM), the swing width of a signal transmitted through a wire line above the PCB substrate should be in a range of 800 mV at 1.0 volt to 1.8 volt.
A conventional semiconductor memory device, as shown in FIG. 1, may include a data swing width controller to correct the swing width of an output data signal to maintain a desired and/or definite level. The data swing width controller may correct the swing width of the data so that the semiconductor memory device may perform a stable operation under poor operating conditions.
Referring to FIG. 1, a memory system may include a memory control device 1 and a semiconductor memory device 2. The semiconductor memory device 2 may include a single data swing width controller 10 and a plurality of output drivers 21 to 2n. The data swing width controller 10 may include an operation control portion 11 and a swing width correcting portion 12 and may substantially simultaneously correct the data swing widths of the plurality of output drivers 21 to 2n. 
Functions of the components of the conventional semiconductor memory device illustrated in FIG. 1 are explained below.
The memory control device 1 may be arranged outside the semiconductor memory device 2 and may control an operation of the semiconductor memory device 2 like a chip set. The memory control device 1 may generate a command com to request a swing width correcting operation and may apply the command com to the semiconductor memory device 2 during a data swing width control operation.
The data swing width controller 10 of the semiconductor memory device 2 may correct the data swing widths of the plurality of output drivers 21 to 2n to match the correction swing width cswing.
For example, the data swing width controller 10 may include an operation control portion 11 and a swing width correcting portion 12. The operation control portion 11 may receive the command com from the memory control device 1 to enable a swing width correcting signal cctrl causing the swing width correcting portion 12 to perform the swing width correcting operation.
The swing width correcting portion 12 may include a comparator 121 and a correct code generator 122. The comparator 121 may receive data D01 from an output driver 21, compare a voltage level of the data D01 to a reference voltage Vref and generate a comparison signal cpsig. The correction code generating portion 122 may vary a code value of a correction code ccode according to the comparison signal cpsig to cause the data swing widths of all of the plurality of output drivers 21 to 2n to become equal to the correction swing width cswing.
The reference voltage Vref may be an average voltage value of a maximum voltage and a minimum voltage of the correction swing width cswing and may have a voltage value for determining the size of the correction swing width cswing.
Each of a plurality of output drivers 21 to 2n may vary the data swing width to be equal to the correction swing width cswing in response to the correction swing code ccode transmitted from the data swing width controller 10 during the swing width correcting operation. Among the plurality of output drivers 21 to 2n, one output driver 21 may transmit the data D01 having a varied swing width to the comparator 121 in the swing width correcting portion 12 so that the data swing width controller 10 is aware of the size of the varied data swing width. A conventional technique of varying the data swing width in response to a predetermined-bit digital code, for example, the correction code ccode, is well known, and thus, a detail description of the conventional technique is omitted herein for the sake of brevity.
An example operation of the conventional memory system of FIG. 1 is explained below.
In this example operation, if the memory control device 1 generates the command com to request the swing width correction operation, the operation control portion 11 enables the swing width correcting signal cctrl causing the swing width correcting portion 12 to perform the swing width correcting operation.
Accordingly, if the data swing width of the reference output driver 21 is smaller than the correction swing width cswing so that the voltage level of the data D01 is higher than the reference voltage Vref, the comparator 121 of the swing width correcting portion 12 generates a comparison signal cpsig having a high level. The correction code generating portion 122 may increase (or decrease) the code value of the correction code ccode by one interval or step, for example, in response to the comparison signal cpsig. Accordingly, all of the plurality of output drivers 21 to 2n increase or decrease the data swing width by a desired and/or predetermined width in response to the correction code ccode.
The comparator 121 and the correction code generating portion 122 may perform the above operation repetitively until the voltage level of the data D01 is equal to the reference voltage Vref, thereby indicating that the data swing widths of all of the plurality of output drivers 21 to 2n are equal to the correction swing width cswing.
Conversely, if the data swing width of the reference output driver 21 is higher than the correction swing width cswing so that the voltage level of the data D01 is lower than the reference voltage Vref, the comparator 121 and the correction code generating 122 may reduce (or increase) the code value of the correction code ccode step by step, for example, to cause the voltage level of the data D01 to be equal to the reference voltage Vref. That is, the data swing widths of all of the plurality of output drivers 21 to 2n become equal to the correction swing width cswing.
As described above, the conventional semiconductor memory device 2 substantially simultaneously corrects the data swing widths of all of the plurality of output drivers 21 to 2n to the correction swing width.
However, the correction swing width is generally directed towards satisfying the worst possible operation condition of the semiconductor memory device and thus, there is a problem because the data swing width may be excessively increased under a normal operation condition.
That is, the conventional data swing width controller may excessively increase the data swing widths of the plurality of output drivers 21 to 2n without considering the operation environment of the semiconductor memory device and the memory system, thereby increasing power consumption of the conventional semiconductor memory device.
Further, if data D01 to D0n output through the plurality of output drivers 21 to 2n are transmitted in the same direction, a simultaneous switching noise (SSN) phenomenon may occur due to the excessively increased data swing width and thus, the whole operation performance of the memory system may deteriorate. The SSN represents a noise which may occur when a plurality of data is transmitted in the same direction through adjacent signal lines and an electric current of data flows excessively.
Still Further, the conventional semiconductor memory device controls the swing widths of all of the output drivers 21 to 2n using the data swing width of the reference output driver 21. Thus, if the reference output driver 21 has the wrong data swing width, the rest of the output drivers 21 to 2n will also have the wrong data swing width. That is, a problem may occur in the conventional semiconductor device because the entire performance of the memory system depends on the data swing width of the reference output driver 21.